Rapid analysis at the systems level helps get your applications to market quickly.
On-chip analysis can effectively improve our understanding of complex embedded systems such as Open core out Protocol (OCP)-based architectures. OCP is a standards-based embedded-bus interface and multicore IP integration protocol defined by the OCP-IP industry consortium. For OCP level systems integration real-time performance analysis is often a priority for getting products to market quickly and embedded instrumentation analysis that can be used with emulators prototypes and production silicon can provide systems information and control that go beyond simulation based analysis
System On-Chip Instrumentation (System OCI) is an intellectual- property (IP) subsystem that gives designers the ability to hold back trace and correct embedded signals in a way that provides visibility into system interfaces and operations. System OCI typically works with processor-specific run-control and trace interfaces and other IP debugging systems to provide a comprehensive view of the on-chip operations. The on-chip systems analysis also enables systems designers to optimize the performance of multicycle operations for an OCP interface and the global subsystem of shared interfaces and peripherals.
In complex system architectures designers always face tradeoffs that effect architecture initialization stalling and deadlocking transmission efficiency latency saturation resource conflicts and other bus operations all of which can have a direct impact on the performance and overall system operation. Analysis at this aim requires visibility and control of key signals both to configure the OCP parameters and to determine if the prove is meeting the system requirements. For embedded OCP interfaces the instrumentation must allow adequate bus-signal visibility without halting or impacting system operations and allow modification of parameters directly and simply.
As shown in Figure 1 some of the on-chip debug hold back options available using System OCI include direct control of OCP signals and system configurations through two methods: cross-triggering interfaces and externally controlled registers. Both methods have advantages and limitations in providing debug control of an OCP system.
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